Update Content - 2024-06-04

content/zettels/analog_to_digital_converters.md

@@ -14,7 +14,7 @@ Tags
 
 <https://dewesoft.com/daq/types-of-adc-converters>
 
--   Delta Sigma (<a href="#citeproc_bib_item_1">Baker 2011</a>)
+-   Delta Sigma <baker11_how_delta_sigma_adcs_work_part>
 -   Successive Approximation
 
 
@@ -84,7 +84,7 @@ The quantization is:
 
 {{< youtube b9lxtOJj3yU >}}
 
-Also see (<a href="#citeproc_bib_item_2">Kester 2005</a>).
+Also see <kester05_takin>.
 
 
 ## Link between required dynamic range and effective number of bits {#link-between-required-dynamic-range-and-effective-number-of-bits}
@@ -96,18 +96,26 @@ Also see (<a href="#citeproc_bib_item_2">Kester 2005</a>).
 
 ## Oversampling {#oversampling}
 
-(<a href="#citeproc_bib_item_3">Lab 2013</a>)
+<lab13_improv_adc>
 
 
 ## Sigma Delta ADC {#sigma-delta-adc}
 
-From (<a href="#citeproc_bib_item_4">Schmidt, Schitter, and Rankers 2020</a>):
+From <&schmidt20_desig_high_perfor_mechat_third_revis_edition>:
 
 > The low cost and excellent linearity properties of the Sigma-Delta ADC have replaced other ADC types in many measurement and registration systems, especially where storage of data is more important than real-time measurement.
 > This has typically been the case in audio recording and reproduction.
 > The reason why this principle is less applied with real-time measurements is the time delay between the bitstream representing the actual value and the availability of the corresponding value after the decimation filter.
 > The resulting **latency** amounts with a low cost sigma-delta ADC approximately **twenty times the sampling period of the decimated digital output**.
 
+<div class="exampl">
+
+A 50kHz decimated sampling frequency has a sample period of 20us, resulting in a total latency of more than 400us.
+This would cause almost 180 degrees phase delay for a 1kHz signal frequency, which is not acceptable with high bandwidth motion control systems.
+This phenomenon clearly illustrates the necessity to distinguish sample frequency from speed.
+
+</div>
+
 Therefore, even though there are sigma-delta ADC with high precision and sampling rate, they add large latency (i.e. time delay) that are very problematic for feedback systems.
 
 > The SAR-ADC (Successive approximation ADCs) is still the mostly applied type for data-acquisition and feedback systems because of its single sample latency.
@@ -117,9 +125,4 @@ Therefore, even though there are sigma-delta ADC with high precision and samplin
 
 ## Bibliography {#bibliography}
 
-<style>.csl-entry{text-indent: -1.5em; margin-left: 1.5em;}</style><div class="csl-bib-body">
-  <div class="csl-entry"><a id="citeproc_bib_item_1"></a>Baker, Bonnie. 2011. “How Delta-Sigma Adcs Work, Part.” <i>Analog Applications</i> 7.</div>
-  <div class="csl-entry"><a id="citeproc_bib_item_2"></a>Kester, Walt. 2005. “Taking the Mystery out of the Infamous Formula, $snr = 6.02 N + 1.76 Db$, and Why You Should Care.”</div>
-  <div class="csl-entry"><a id="citeproc_bib_item_3"></a>Lab, Silicon. 2013. “Improving the ADC Resolution by Oversampling and Averaging.” Silicon Laboratories.</div>
-  <div class="csl-entry"><a id="citeproc_bib_item_4"></a>Schmidt, R Munnig, Georg Schitter, and Adrian Rankers. 2020. <i>The Design of High Performance Mechatronics - Third Revised Edition</i>. Ios Press.</div>
-</div>
+<./biblio/references.bib>